pmc-1981271 (r4) proprietary and confidential to pmc-sierra, inc. and for it?s customers? internal use ? 2001 pmc-sierra, inc. pm5313 pmc-sierra,inc. sonet/sdh payload extractor/aligner for 622 mbit/s interfaces spectra-622 features the spectra-622 chip offers the following features: ? monolithic sonet/sdh payload-extractor/aligner for use in sts-12 (stm-4/au3 or stm-4/au4) or stm-12c (stm-4/au4-4c) interface applications that operate at serial interface speeds up to 622.08 mbit/s. provides integrated clock recovery and clock synthesis to allow a direct interface to optical modules. complies with bellcore gr-253-core jitter tolerance and intrinsic jitter criteria. provides control circuitry required to comply with wan clocking requirements for wander, holdover, and long term stability. provides termination for sonet section and line, and sdh regenerator section and multiplexer section transport-overhead. also provides termination for path overhead of twelve sts-1 (stm-0/au3) paths, four sts-3/ 3c (stm-1/au3/au4) paths, or a single sts-12c (stm-4/au4-4c) path. maps twelve sts-1 (stm-0/au3) payloads, four sts-3/3c (stm-1/au3/ au4) payloads, or a single sts-12c (stm-4/au4-4c) payload to system timing references. this accommodates plesiochronous timing offsets between the references. maps twelve ds3 bit-streams into an sts-12 (stm-4/au3) frame. configurable on an sts-1 basis to support a mix of traffic from the ds-3 and telecom interfaces. provides a time-slot interchange (tsi) function on the telecom add and drop buses for grooming twelve sts-1 (stm-0/au3) paths or four sts-3/3c (stm-1/au3/au4) paths. supports line loopback and diagnostic loopback. supports oc-48 (stm-16) applications with byte interfaces for connection to an oc-48 front-end device. supports diagnostic 2 23 -1 pseudo-random bit-sequence (prbs) generation and monitoring. provides a standard jtag test-port for boundary scan board-test purposes. provides a generic 8-bit microprocessor bus-interface. low-power 3.3v cmos with ttl compatible inputs and cmos/ttl digital outputs. pecl inputs and outputs are 3.3v and 5v compatible. available in a 520-pin sbga package. supports industrial temperature-range (-40c to 85c) operation. drop bus prbs generator/ monitor rx telecombus system interface rx timeslot interchange rx telecom aligner rx path o/h processor rx line o/h processor rx section o/h processor clock & data recovery rx line interface add bus prbs generator/ monitor tx telecombus system interface tx timeslot interchange tx pointer interpreter tx telecom aligner tx line o/h processor tx section o/h processor clock synthesis ds3 mapper add side tx line interface tx transport o/h controller ds3 mapper drop side receive path processing slice x12 rx ds3 system i/f rx aps synch extractor & bit error monitor serial control port microprocessor interface jtag test access port rx transport o/h controller path trace buffer tx path o/h processor tx ds3 system i/f transmit path processing slice x12 rx ring control port tx ring control port section trace buffer wan sync controller tdp rrclk+/- rxd+/- refclk+/- peclv td[7:0] tfpi tpl tc1j1v1/tfpo tdck tdref/ tdref1 txd+/- sd c0, c1 piclk pin[7:0] fpin oof atp[1:0] prefen peclref ds3ticlk [12:1] ac1j1v1[4:1]/ afp[4:1] apl[4:1] ad[31:0] adp[4:1] dck dc1j1v1[4:1] dpl[4:1] dd[31:0] ddp[4:1] dfp ds3tdat [12:1] ds3rdat [12:1] ds3roclk [12:1] ds3riclk ack los/rrcpfp d[7:0] rad b3e rtcoh rtcen ralm rpohen rpohclk rpohfp rpoh rtohclk rtohfp rtoh rldclk, rohclk rsld, rsow, rsuc rsldclk, rowclk lof, salm lrdi/rrcpclk lais/rrcpdat tms tck tdi tdo mbeb intb rstb rdb/e wrb, rwb csb ale a[13:0] trstb rld, rlow, roh ttohen ttohclk ttohfp ttoh/ttohrei tsld/tsow/tsuc tsldclk/towclk tlais/trcpdat rlais/trcpclk tlrdi/trcpfp tpoh tpohrdy tad/tafp/tack tpohen tpohclk tpohfp tld/tlow/toh tldclk/towclk tclk/pgmtclk /tfp rclk/pgmrclk /rfp dpais dmode[1:0] dpaisfp dpaisck tpais tpaisfp tpaisck scpi[3:0] scpo[1:0] block diagram
head office: pmc-sierra, inc. 8555 baxter place burnaby, b.c. v5a 4v7 canada tel: 604.415.6000 fax: 604.415.6200 pm5313 spectra-622 sonet/sdh payload extractor/aligner for 622 mbit/s interfaces to order documentation, send email to: document@pmc-sierra.com or contact the head office, attn: document coordinator all product documentation is available on our web site at: http://www.pmc-sierra.com for corporate information, send email to: info@pmc-sierra.com pmc-1981271 (r4) ? 2001 pmc-sierra, inc. freedm-8 is a trademark of pmc-sierra, inc. proprietary and confidential to pmc-sierra, inc. and for it ? s customers ? internal use backplane/device modes 77.76 mhz telecom byte 19.44 mhz telecom byte x 4 datacom ds-3 x 12 applications use the spectra-622 chip in the following applications: sonet/sdh add/drop multiplexers sonet/sdh terminal multiplexers sonet/sdh digital cross-connects channelized routers and switches typical applications sts-12/stm-4 aggregate interface with tributary pointer processing and performance monitoring channelized oc-12 interface for high speed routers pm5363 tupp+622 optical transceiver drop add 622 mbit/s optical interface 77.76 mhz 8-bit high-speed telecombus interface rxd +/- txd +/- sd ack ad[7:0], adp[1] apl[1] ac1j1v1[1] dd[7:0], ddp[1] dck dpl[1] dc1j1v1[1] id[7:0], idp[1] ic1j1[1] hsclk ipl[1] od[7:0], odp[1] oc1j1v1[1] opl[1] pm5313 spectra-622 freedm-8 freedm-8 freedm-8 freedm-8 freedm-8 freedm-8 s/uni qjet s/uni qjet s/uni qjet spectra- 622 opt opt channelized oc-12 card 622 mbit/s optical interface bus interface
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